Summary of the SLT meeting of May 23, 1996, DESY HH. M. Medinnis Present: M. Dam, A. Gellrich, J.D. Hansen P. Kreuzer, M. Medinnis, D. Ressing, S. Scharein, H. Thurn 0. Disposition of minutes: Up until now, the minutes of the SLT meetings have been distributed mainly only to participants. We decided that minutes should first be e-mailed to participants and then, after a week or so (to give the opportunity to make corrections), posted to the SLT news group. The minutes of the last few meetings will also be posted in about a week. 1. Status of simulation (P.K.): The 50,000 event sample produced by the FLT group (in "old" i.e. pre-Arte format) is currently being gone through to produce output files containing FLT-triggered events in standard SLT format. The new files contain hits from all tracking chambers, including the magnet chambers, and the silicon detector. They should be suitable for studying both magnet and silicon tracking in addition to the FLT-refit portion of the algorithm. In addition to hits, M.C. cross-reference info is included. Each event occupies about 2 MBytes (uncompressed). 100-150 hours CPU time on hera-b will be needed (the time consuming part was already done by the FLT group). 2. Status of FLT-refit (H.T.): Currently, the primary emphasis is on preparation for benchmarking, particularly on the SHARC board. H.T. restructured the topology such that a single node handles a filter step for a full superlayer. (Before, a node handled only a section of a superlayer.) This restructuring is useful for benchmarking, particularly given the small existing event sample, since all events then go through each node. The new structure is also interesting since it would allow implementation as a "farm of pipes". H.T. is now getting the code to work with the spy. He is able to produce data files using the spy but the stand-alone program does not yet cycle properly with them. He hopes to have solved the problems in time to have benchmark results for the collaboration meeting. H.T. also hopes to update his efficiency/suppression numbers using the new event sample in time for the collaboration meeting. 3. Status of the silicon tracker (S.E. in abstentia): Samim Erhan was unfortunately unable to attend the meeting but sent a short status report on his activities by e-mail: I have no new results on the efficiencies, progress was limited to more compactification of service modules (FEDBUf,FLTBuf and SLTComp) for preparation for benchmarking. I also got J.D.H.'s original code to work with the same event sample and fixed a bug I found in (checked and confirmed by J.D.H. who adds that after correction, his efficiency for signal went from 101/102 events to 102/102 events ). I still have to introduce the same event selection cuts (before the SLT algorithm) to compare the both methods event by event basis. I also run both the L2SIMU and J.D.H.'s code through gprof. I found out that J.D.H.'s code takes much less time, but this is mostly due to L2SIMU over head. My next goal is to understand these timing differences. 4. Status of "pre-FLT-refit" (M.M.): This algorithm and motivation for it can be found in the minutes of the 29/4 meeting. Little progress was made owing to lack of time. An error was found and corrected but a new bug was introduced [which has since been corrected with the result that performance is about as reported at the 29/4 meeting]. In discussion, it still appears probably advantageous to apply a fast algorithm (compared to a Kalman filter) such as this one to suppress ghosts and provide a conditional accept before going through the Kalman filter step. (A name for the algorithm was suggested: "Slice" or "Slicer".) 5. Status of the magnet tracker (J.D.H.): Stefania Xella from NBI will start to look into the problem as soon as simulated data is available. She will start by using the event file produced by P.K., working with PAW. 6. Arte/L2simu integration (M.M & P.K.): We decided to discard the (temporary) solution using UNIX pipes discussed at the last meeting given H. Albrecht's strong opposition. P.K. & M.M. will attack this problem after the collaboration meeting. 7. Status of the SHARC board (D.R.): The board is now being fairly thouroughly exercised as a result of J. Luedeman's development work on the SHARC library. There are no known problems with the board itself, including the VME interface, however the current version of the SHARC chip still has bugs. Apart from one problem, workarounds have been found. The one unsolvable problem is that the SHARC can only transmit across links at half speed (although it is capable of receiving at full speed). Thus, for '97 run and for benchmarking work, the board and the SHARCs are working well enough. 8. Status of the SHARC library (D.R.): The SHARC library is nearly finished (apart from semaphores) and is now usable. We are encouraged to start using it soon as this will speed up the debugging process. A full-featured version is expected before the collaboration meeting. 9. Status of the spy (M.M.): The L2simu spy mechanism (see minutes of the last meeting) seems to be working. Code from Slicer was successfully extracted from L2simu, along with data and run on a SHARC (at NBI). H.T. is having some problems using it so it is not yet clear whether all the bugs have been worked out. 10. Benchmarking plans (M.M.): The first step is to run stand alone benchmarks produced by the spy without using any i/o. It appears that all that is needed to run such benchmarks now exists. It's only a question of putting it all together. We are aiming to have benchmark results from the FLT-refit algorithm available for the collaboration meeting. D.R.: Three setups which include a SHARC board, VME crate and crate controller are now running in bldg. 49. Any of these can in principle be used, however time-sharing with other groups must be arranged. M.M. will bring a SHARC board to Zeuthen and will attempt to get another setup going there (also for use by the farm group). One final note, the SHARC boards in the 3 setups in bldg. 49 can be accessed over the net. 11. Status of the C104 & SHARC/C104 interface (M.D.): Bandwidth from the SHARC to the dual-port memory on the NBI interface board was measured and found to be 80 MBytes/sec. The theoretical bandwidth for a 33 MHz SHARC is 132 MBytes/sec. The discrepancy is not understood although, for the purposes of the interface board, 80 MBytes/sec is already adequate since the aggregate bandwidth of the 12 DS links on the board is 12 x 5 = 60 MBytes/sec. A full system test involving two such interface boards and a C104 board will be run as soon as a working C104 board is available at the NBI (the one there now is not stable). 12. SLT architecture, how do we decide (M.M.): Until now, only one concrete proposal has been made for the topology of the SLT. That one proposal is embodied in the linked-pipeline topology of the FLT-refit algorithm. This proposal itself has some difficulties: the one-to-one correspondance of SLB and SLT nodes is not realizable in practice although an acceptable work-around may be possible. Also, the rigid structure makes load-balancing difficult. Suggestions have been made by various parties (e.g. M.M., J.D.H., I.L ...) of different configurations possibly using processors other than the SHARC and possibly using a general purpose switch (of which the C104 is an example) however nothing concrete has been proposed. Given our severe manpower constraints and commitment to build a prototype system for the '97 run, we must soon decide on one approach. The following procedure and timescale was proposed: _____________________________________________________________________ Boundary conditions Any proposal must fulfill the requirements set out in the SLT requirements document Some needed items (now) missing from req doc: regarding SLB: Max. SLT request rate Max. Conditional accept rate # of uncompressed buffer available # of compressed buffers available Max. event builder rate These items will be supplied by the DAQ group. Regarding the switching network, the following should be added: The SLT will be configured in blocks or "subroutines". The switch must be such that data can (at least in principle) be collected from the following blocks into a single SLT node: -Tracking chambers behind the magnet (all views) -The electromagnetic calorimeter -Tracking chambers inside the magnet (all views) -The silicon detector Some communication between blocks is needed. This should include refined RoI estimates and the hits actually used (needed for L3). What to decide on: a prototype system for '97. The prototype system will then serve as a basis for what is built for '98. It must be ready and working in 4/97. When to decide: 10/96 How to decide: Have detailed proposal descriptions available for the next SLT meeting following the collaboration meeting (8/96), including: -layout -cost estimates -manpower needs -required supporting environment At decision time (10/96), the following should be fulfilled: -All needed components must exist and be tested -Estimates for latencies based on simulation and/or measurements exist -A Refined version of the proposal description _____________________________________________________________________ After some discussion and adjustment of dates (reflected in the above), the proposal was accepted. 13. SLB <--> SLT communications, a SHARC only solution (M.M.): M.M. presented the current (early) status of his proposal for a SHARC-only topology for the first part (Slicer or x-view FLT-refit) of the SLT algorithm. The basic idea is to fan out the FLT RoI to appropriate SLB nodes and collect any hits into a "mini-farm" of SHARC processors which make decisions based on RoIs and then forward the decision to a designated "event filter" which makes a conditional-accept decision. A total of 10 different processes are needed. 8 SHARC boards are needed in addition to the boards running the RoI filter process (of order 10-20 boards). The intention is to further refine the design (in collaboration with S.E.) and then to implement it within L2simu on the time scale of a few monthes. It is intended that this proposal be a basis for the '97 prototype system and thus be considered in the procedure outlined above. 14. Goals for the June meeting: These were discussed in the context of talks to be presented in the DAQ/SLT/farm "plenary" meeting. The following agenda was decided on: M.M. 10' Introduction P.K. 15' Simulation status, Arte integration status H.T. 30' New simulation results, FLT-refit benchmarks S.E. 25' Status of the silicon tracker M.D. 30' Status of the DS link/SHARC interface M.M. 30' Status of SHARC-only SLT proposal, Status of Slicer 15. The next SLT meeting (after Zeuthen) will take place on August 5,6 at NBI.